Work to be performed includes developing next generation power semiconductors based on 300mm wafers, setting up the required technologies as pilot line manufacturing, and demonstrating the thus achieved reliable and advantageous solutions for a wide range of ENIAC grand challenge application fields.


Set on a common technology base to be developed, the project aims at achieving the realization of demonstrators in a pilot line, and demonstrating production readiness in the large-scale production environments of strategically selected products and technologies. The demonstrators will be verified in fully functional, energy efficient power applications. Thus, the project will establish the technological base for providing leading energy efficient applications enabled by innovations in power technologies.

  • To allow this, the project will deal with challenges related to process and production technologies and dedicated manufacturing processes for 300mm wafers:
  • Research on next generation of advanced power semiconductor technologies fabricated on 300mm wafers
  • Identify and optimize relevant power semiconductor characteristics taking into account demonstrator application requirements of strategic importance
  • Prove reliability and yield targets of the power semiconductor pilot line
  • Setting up a pilot line for next generation power semiconductor production on 300mm wafers compining at least two European production sites
  • Achieve best-in-class productivity in manufacturing leading-edge power semiconductors for advanced, energy efficient industrial, medical & mobility applications
  • Optimize chip-to-package interfacing stack for advanced 3D integration capabilities, including a 3D pilot line setup for Si interposer
  • Strengthen European intellectual property in semiconductor technology, manufacturing and assembly.

Global responsibilities will thus be shared in a pilot line stretching across several European countries: Austria, France, Germany, Italy, Portugal and The Netherlands.

EPPL will contribute to the following Grand Challenges: equipment, materials and manufacturing; energy efficiency; semiconductor process and integration.