Project work

Europe’s core competencies in power semiconductor technologies are directly impacting our everyday life. We find them in applications like eco-friendly solar power generation, extended range automotive mobility, high power and efficient automotive LED's or smarter and more powerful medical-diagnostic appliances.

A sustainable and competitive European power semiconductor industry is essential to support the megatrend developments formulated in the Europe 2020 strategy - climate change; competitive, sustainable and secure energy; food security and health & ageing population. It is of paramount importance to defend and further extend Europe’s leading position in both power semiconductor manufacturing science(s) and the corresponding application domains.

Thus, the ENIAC JU project EPPL will combine research, development and innovation to demonstrate market readiness by industrial implementation at an early stage. Second generation power semiconductor devices fabricated in European leading 300mm pilot lines are at the heart of the project, for which manufacturing excellence, cost competitiveness and challenging applications are critical boundary conditions. With this, to leverage the technical characteristics of power devices and foster the trend towards system-in-package integration, advances in packaging technologies become of prime importance. These aspects will be fully supported by this project right from the beginning.

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  • Name:                      EPPL - Enhanced Power Pilot Line
  • Duration:                 April 2013 - March 2016
  • Total Costs:           € 74,818,528.00
  • EC-Contribution:  € 11,222,780.00
  • Consortium:          31 partners from 6 nations
  • Coordinator:          Infineon Technologies Austria AG 

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Infineon Technologies
Austria AG


Work to be performed includes developing next generation power semiconductors based on 300mm wafers, setting up the required technologies as pilot line manufacturing, and demonstrating the thus achieved reliable and advantageous solutions for a wide range of ENIAC grand challenge application fields.


Set on a common technology base to be developed, the project aims at achieving the realization of demonstrators in a pilot line, and demonstrating production readiness in the large-scale production environments of strategically selected products and technologies. The demonstrators will be verified in fully functional, energy efficient power applications. Thus, the project will establish the technological base for providing leading energy efficient applications enabled by innovations in power technologies.

  • To allow this, the project will deal with challenges related to process and production technologies and dedicated manufacturing processes for 300mm wafers:
  • Research on next generation of advanced power semiconductor technologies fabricated on 300mm wafers
  • Identify and optimize relevant power semiconductor characteristics taking into account demonstrator application requirements of strategic importance
  • Prove reliability and yield targets of the power semiconductor pilot line
  • Setting up a pilot line for next generation power semiconductor production on 300mm wafers compining at least two European production sites
  • Achieve best-in-class productivity in manufacturing leading-edge power semiconductors for advanced, energy efficient industrial, medical & mobility applications
  • Optimize chip-to-package interfacing stack for advanced 3D integration capabilities, including a 3D pilot line setup for Si interposer
  • Strengthen European intellectual property in semiconductor technology, manufacturing and assembly.

Global responsibilities will thus be shared in a pilot line stretching across several European countries: Austria, France, Germany, Italy, Portugal and The Netherlands.

EPPL will contribute to the following Grand Challenges: equipment, materials and manufacturing; energy efficiency; semiconductor process and integration.

Work Plan

The project is clearly structured by work tasks and correspondingly organized into 9 work packages.

WP1, WP2, WP3 and WP4 are the core pilot line activities that will lead to a fully functional and qualified European power semiconductor facility also including integrated packaging. Gaining early yield learning data by manufacturing small quantities of demonstrator devices will enable fast ramp to volume production after finishing the EPPL project.

The application-oriented WP5- renewable solar, WP6 - automotive and LED for mobility applications and WP8 - healthcare, are dedicated to proper definition of the device requirements, to prove quality and functionality of the selected new power semiconductor devices, again including assembly technologies.

WP9 and WP10 finally establish the project framework for dissemination, exploitation and project management. This will also include risk mitigation which is vital to successfully achieve the ambitious project goals.